1. Field of the Invention
The present invention relates to computer architecture. More specifically, the present invention relates to a method and apparatus for managing a translation lookaside buffer (TLB).
2. Description of Related Art
In modern computer architecture, the address mapping mechanism is widely applied. In a system, memory addresses used by high-level applications are virtual addresses (VAs). An operating system (OS) is responsible for mapping the VAs indicated by the applications to physical addresses (PAs) of the memory so as to achieve access to the memory resource. With development of technologies such as virtualization, address mapping may need to perform multiple times of the address translations. Specifically, virtualization allows multiple OSs to run concurrently on a single physical machine. Accordingly, a software layer called hypervisor is introduced for controlling access of a guest OS to the system's physical resources. At this point, address mapping comprises two address translations. First, the guest OS translates the guest virtual address (GVA) indicated by a guest application into a guest physical address (GPA). Then the hypervisor translates the GPA into a host physical address (HPA) which is an actual memory physical address.
In order to accelerate address translation, most modern computer processors are equipped with a translation lookaside buffer (TLB). TLB is a cache of a page table used for storing some entries in the page table. When performing address translation, the TLB is first accessed. If a page table entry containing the requested virtual address is present in the TLB (i.e., TLB hit), then the address translation can be quickly implemented. On the other hand, if the page table entry containing the requested virtual address is absent in the TLB (i.e., TLB miss), it is necessary to query the corresponding entry in the page table and write that entry into the TLB.
Generally speaking, there are two TLB management mechanisms, i.e., hardware management mechanism and software management mechanism. Compared with traditional hardware management mechanism, a software-managed TLB can realize a greater flexibility and therefore has been commonly used. However, in traditional software managed TLB, since the guest OS cannot access the TLB stored in hardware, the hypervisor must maintain a shadow TLB. Moreover, various operations caused by a TLB miss have to be handled by the hypervisor. During those operations, one or more handovers might have to be performed between a user mode and a privileged mode. As a result, such software management mechanisms cause significant overheads and seriously deteriorate the overall performance of the system.
Therefore, there is a need in the art to provide a method and apparatus for enabling software TLB management in a more efficient and effective way.